31 research outputs found
On Maximum-Likelihood Decoding of Time-Varying Trellis Codes
Decoding complexity of convolutional and trellis codes by Viterbi decoder can be reduced by applying suggested merging algorithm to the Forney code trellis. The algorithm can be applied for every trellis section separately, which is convenient for time-varying codes, and it outputs the minimal trellis of the section. In case of convolutional codes, the same minimal trellis of every section can be obtained from the syndrome trellis of proposed split code
Fast Decoding of Codes in the Rank, Subspace, and Sum-Rank Metric
We speed up existing decoding algorithms for three code classes in different
metrics: interleaved Gabidulin codes in the rank metric, lifted interleaved
Gabidulin codes in the subspace metric, and linearized Reed-Solomon codes in
the sum-rank metric. The speed-ups are achieved by reducing the core of the
underlying computational problems of the decoders to one common tool: computing
left and right approximant bases of matrices over skew polynomial rings. To
accomplish this, we describe a skew-analogue of the existing PM-Basis algorithm
for matrices over usual polynomials. This captures the bulk of the work in
multiplication of skew polynomials, and the complexity benefit comes from
existing algorithms performing this faster than in classical quadratic
complexity. The new faster algorithms for the various decoding-related
computational problems are interesting in their own and have further
applications, in particular parts of decoders of several other codes and
foundational problems related to the remainder-evaluation of skew polynomials
Improving the Decoding Threshold of Tailbiting Spatially Coupled LDPC Codes by Energy Shaping
We show how the iterative decoding threshold of tailbiting spatially coupled (SC) low-density parity-check (LDPC) code ensembles can be improved over the binary input additive white Gaussian noise channel by allowing the use of different transmission energies for the codeword bits. We refer to the proposed approach as energy shaping. We focus on the special case where the transmission energy of a bit is selected among two values, and where a contiguous portion of the codeword is transmitted with the largest one. Given these constraints, an optimal energy boosting policy is derived by means of protograph extrinsic information transfer analysis. We show that the threshold of tailbiting SC-LDPC code ensembles can be made close to that of terminated code ensembles while avoiding the rate loss (due to termination). The analysis is complemented by Monte Carlo simulations, which confirm the viability of the approach
Analysis of Communication Channels Related to Physical Unclonable Functions
Cryptographic algorithms rely on the secrecy of their corresponding keys. On embedded systems with standard CMOS chips, where
secure permanent memory such as flash is not available as a key storage, the secret key can be derived from Physical Unclonable Functions
(PUFs) that make use of minuscule manufacturing variations of, for instance, SRAM cells. Since PUFs are affected by environmental changes,
the reliable reproduction of the PUF key requires error correction. For
silicon PUFs with binary output, errors occur in the form of bitflips
within the PUF response. Modeling the channel as a Binary Symmetric
Channel (BSC) with fixed crossover probability p is only a first-order
approximation of the real behavior of the PUF response. We propose a
more realistic channel model, referred to as the Varying Binary Symmetric Channel (VBSC), which takes into account that the reliability of
different PUF response bits may not be equal. We investigate its channel
capacity for various scenarios which differ in the channel state information (CSI) present at encoder and decoder. We compare the capacity
results for the VBSC for the different CSI cases with reference to the
distribution of the bitflip probability according to a work by Maes et al
Analysis of Communication Channels Related to Physical Unclonable Functions
Cryptographic algorithms rely on the secrecy of their corresponding keys. On embedded systems with standard CMOS chips, where
secure permanent memory such as flash is not available as a key storage, the secret key can be derived from Physical Unclonable Functions
(PUFs) that make use of minuscule manufacturing variations of, for instance, SRAM cells. Since PUFs are affected by environmental changes,
the reliable reproduction of the PUF key requires error correction. For
silicon PUFs with binary output, errors occur in the form of bitflips
within the PUF response. Modeling the channel as a Binary Symmetric
Channel (BSC) with fixed crossover probability p is only a first-order
approximation of the real behavior of the PUF response. We propose a
more realistic channel model, referred to as the Varying Binary Symmetric Channel (VBSC), which takes into account that the reliability of
different PUF response bits may not be equal. We investigate its channel
capacity for various scenarios which differ in the channel state information (CSI) present at encoder and decoder. We compare the capacity
results for the VBSC for the different CSI cases with reference to the
distribution of the bitflip probability according to a work by Maes et al